
Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces: High Performance Compute and System-In-Package (Hardcover)
內容描述
This book provides an in-depth understanding of the various fan-out and embedded die approaches given by authors offering differing perspectives. It begins by benchmarking the latest application space, then moves on to a market forecast that attempts to reverse engineer the products that will be available. The book also provides an analysis of the IP landscape and cost comparison of new and existing technologies. It then describes solutions developed and offered by Semiconductor IDM companies driving new package types for advanced application space (e.g. Intel, NXP, Samsung). The book addresses the semiconductor needs of various foundries and manufacturers, and concludes by exploring cutting edge research ongoing at institutes and consortiums.
作者介紹
Beth Keser, PhD, is an IEEE Fellow and Distinguished Lecturer with over 23 years' experience in the semiconductor industry and a co-Editor of Advances in Embedded and Fan-Out Wafer Level Packaging Technologies. Beth's excellence in developing revolutionary electronic packages for semiconductor devices has resulted in 30 patents and patents pending and over 50 publications in the semiconductor industry.
Steffen Kröhnert is President & Founder of ESPAT-Consulting in Dresden, Germany. He is member of IEE EPS and co-Editor of Advances in Embedded and Fan-Out Wafer Level Packaging Technologies. Steffen has over 20 years' experience in the semiconductor industry and is the author or co-author of 23 patent filings.