Practical FPGA Programming in C (Hardcover)

Practical FPGA Programming in C (Hardcover)

作者: David Pellerin Scott Thibault
出版社: Prentice Hall
出版在: 2005-05-02
ISBN-13: 9780131543188
ISBN-10: 0131543180
裝訂格式: Paperback
總頁數: 472 頁





內容描述


Table of Contents:

Foreword by Clive "Max" Maxfield.
    Why is this book of interest to the
hardware folks?
    And what about the software guys and
gals?
    So what's the catch?
Preface.
    C Language for FPGA-Based Hardware
Design?
    Compelling Platforms for Software
Acceleration.
    The Power to Experiment.
    How This Book Is Organized.
    Where This Book Came From.
Acknowledgments/

  1. The FPGA as a Computing Platform.
        A Quick Introduction to
    FPGAs.
        FPGA-Based Programmable Hardware
    Platforms.
        Increasing Performance While Lowering
    Costs.
        The Role of Tools.
        The FPGA as an Embedded Software
    Platform.
        The Importance of a Programming
    Abstraction.
        When Is C Language Appropriate for FPGA
    Design?
        How to Use This Book.
  2. A Brief History of Programmable
    Platforms.
        The Origins of Programmable
    Logic.
        Reprogrammability, HDLs, and the Rise
    of the FPGA.
        Systems on a Programmable
    Chip.
        FPGAs for Parallel
    Computing.
        Summary.
  3. A Programming Model for FPGA-Based
    Applications.
        Parallel Processing Models.
        FPGAs as Parallel Computing
    Machines.
        Programming for Parallelism.
        Communicating Process Programming
    Models.
        The Impulse C Programming
    Model.
        Summary.
  4. An Introduction to Impulse C.
        The Motivation Behind Impulse
    C.
        The Impulse C Programming
    Model.
        A Minimal Impulse C Program.
        Processes, Streams, Signals, and
    Memory.
        Impulse C Signed and Unsigned
    Datatypes.
        Understanding Processes.
        Understanding Streams.
        Using Output Streams.
        Using Input Streams.
        Avoiding Stream Deadlocks.
        Creating and Using Signals.
        Understanding Registers.
        Using Shared Memories.
        Memory and Stream Performance
    Considerations.
        Summary.
  5. Describing a FIR Filter.
        Design Overview.
        The FIR Filter Hardware
    Process.
        The Software Test Bench.
        Desktop Simulation.
        Application Monitoring.
        Summary.
  6. Generating FPGA Hardware.
        The Hardware Generation
    Flow.
        Understanding the Generated
    Structure.
        Stream and Signal
    Interfaces.
        Using HDL Simulation to Understand
    Stream Protocols.
        Debugging the Generated
    Hardware.
        Hardware Generation Notes.
        Making Efficient Use of the
    Optimizers.
        Language Constraints for Hardware
    Processes.
        Summary.
  7. Increasing Statement-Level Parallelism.
        A Model of FPGA Computation.
        C Language Semantics and
    Parallelism.
        Exploiting Instruction-Level
    Parallelism.
        Limiting Instruction Stages.
        Unrolling Loops.
        Pipelining Explained.
        Summary.
  8. Porting a Legacy Application to Impulse
    C.
        The Triple-DES Algorithm.
        Converting the Algorithm to a Streaming
    Model.
        Performing Software
    Simulation.
        Compiling to Hardware.
        Preliminary Hardware
    Analysis.
        Summary.
  9. Creating an Embedded Test Bench.
        A Mixed Hardware and Software
    Approach.
        The Embedded Processor as a Test
    Generator.
        The Role of Hardware
    Simulators.
        Testing the Triple-DES Algorithm in
    Hardware.
        Software Stream Macro
    Interfaces.
        Building the Test System.
        Summary.
  10. Optimizing C for FPGA Performance.
        Rethinking an Algorithm for
    Performance.
        Refinement 1: Reducing Size by
    Introducing a Loop.
        Refinement 2: Array
    Splitting.
        Refinement 3: Improving Streaming
    Performance.
        Refinement 4: Loop
    Unrolling.
        Refinement 5: Pipelining the Main
    Loop.
        Summary.
  11. Describing System-Level Parallelism.
        Design Overview.
        Performing Desktop
    Simulation.
        Refinement 1: Creating Parallel 8-Bit
    Filters.
        Refinement 2: Creating a System-Level
    Pipeline.
        Moving the Application to
    Hardware.
        Summary.
  12. Combining Impulse C with an Embedded Operating
    System.
        The uClinux Operating
    System.
        A uClinux Demonstration
    Project.
        Summary.
  13. Mandelbrot Image Generation.
        Design Overview.
        Expressing the Algorithm in
    C.
        Creating a Fixed-Point
    Equivalent.
        Creating a Streaming
    Version.
        Parallelizing the Algorithm.
        Future Refinements.
        Summary.
  14. The Future Of FPGA Computing.
        The FPGA as a High-Performance
    Computer.
        The Future of FPGA
    Computing.
        Summary.
    Appendix A. Getting the Most Out of Embedded FPGA
    Processors.
        FPGA Embedded Processor
    Overview.
        Peripherals and Memory
    Controllers.
        Increasing Processor
    Performance.
        Optimization Techniques That Are Not
    FPGA-Specific.
        FPGA-Specific Optimization
    Techniques.
        Summary.
    Appendix B. Creating a Custom Stream
    Interface.
        Application Overview.
        The DS92LV16 Serial Link for Data
    Streaming.
        Stream Interface State Machine
    Description.
        Data Transmission.
        Summary.
    Appendix C. Impulse C Function Reference.
    Appendix D. Triple-Des Source Listings.
    Appendix E. Image Filter Listings.
    Appendix F. Selected References.
    Index.



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